Design Verification Engineers

الوصف الوظيفي

ASAL Technologies is the largest software R&D house in Palestine based in Rawabi city

We are looking for an outstanding Design Verification Engineers with a passion to verify the correctness of the hardware design. The candidates will learn the full hardware verification flow and become expert in design verification area using the most popular EDA tools.

Description:

Develop verification environment of block, system and chip levels.
Develop entire verification flow including test plan, implementation (tests and simulation) and coverage collection.
Implement design using Verilog HDL and VHDL.
Develop methodologies, scripts and infrastructure improvements.

جميع الحقوق محفوظة لموقع جوبس.

متطلبات الوظيفة

 Requirements

B.Sc. in Computer/Electrical/Electronic Engineering.
Knowledge in Object-Oriented Programming (OOP) is a must.
Knowledge of data structure and algorithms is a must.
Knowledge of Digital/Analog circuits is must.
Knowledge in Verilog HDL or VHDL language is a must.
Knowledge of Unix/Linux – advantage.
Knowledge in integration, debugging, functional verification and test plan development – advantage.
Knowledge of system level, chip level, and Block level verification and test bench development – advantage.
تفاصيل الوظيفة
المسمى الوظيفي Design Verification Engineers
آخر موعد للتقديم 15 - Jan - 2019
المكان روابي
نوع الوظيفة دوام كامل
المستوى المهني متوسط الخبرة
الراتب N/A
الدرجة العلمية البكالوريوس
الخبرة 1 Year
آلية التقديم

Interested and qualified candidates can apply online through Apply Now - تقدم الآن لهذه الوظيفة 

نصيحة من جوبس لحمايتك : عند التقدم لاية وظيفة عن طريق الانترنت، لا تقم بإعطاء معلومات بطاقة الأعتماد او أية معلومات بنكية / مالية لصاحب عمل.