Design Verification Engineer

الوصف الوظيفي

We are looking for an outstanding university graduates or engineers with one year of relevant experinece. The job requires a passion to verify the quality of the hardware design and debug tools. The engineer will objectively investigate and stress new features and expose weaknesses in their implementation.

The engineer will develop and maintain product’s logic validation including full ownership on the random system and validation scripts, find bugs and add new tests features to enhance the verification capabilities, integrate tests

متطلبات الوظيفة

Technical Requirements:

  • BS graduate in Computer Science or Computer Engineering.
  • Background in software testing – advantage.
  • Knowledge in Verilog HDL language – advantage.
  • Object Oriented Programming skills – advantage.
  • Knowledge of Unix/Linux – advantage.
  • Knowledge in script writing – advantage.
  • Familiar with text editors such as vi and emacs.
  • Out of the box thinking, in order to challenge the feature implementation.

Desired Personality Characteristic:

  • Independent learner.
  • Independent worker and problem-solver.
  • Good interpersonal relationships.
  • Ability to convey opinion and requirements.
  • Strong English communication skills.
تفاصيل الوظيفة
المسمى الوظيفي Design Verification Engineer
آخر موعد للتقديم 06 - Apr - 2018
المكان رام الله والبيرة
نوع الوظيفة دوام كامل
المستوى المهني متوسط الخبرة
الراتب N/A
الدرجة العلمية البكالوريوس
الخبرة 1 Year
آلية التقديم

Interested candidates can send their CV’s to [email protected] and write DV in the subject field.

نصيحة من جوبس لحمايتك : عند التقدم لاية وظيفة عن طريق الانترنت، لا تقم بإعطاء معلومات بطاقة الأعتماد او أية معلومات بنكية / مالية لصاحب عمل.