Design Verification Engineer

الوصف الوظيفي

ProGineer Technologies is looking to fill the following position:

Design Verification (DV) Engineer

We are looking for an outstanding university graduates with a passion to verify the quality of the hardware design and debug tools. The engineer will objectively investigate and stress new features and expose weaknesses in their implementation.

The candidates will learn the full domain of the product and become experts in the EDA tools and debug field.

Technical Requirements:

-    BS graduate in Computer Science or Computer Engineering.
-    Background in software testing – advantage.
-    Knowledge in Verilog HDL language – advantage.
-    Object Oriented Programming skills – advantage.
-    Knowledge of Unix/Linux – advantage.
-    Knowledge in script writing – advantage.
-    Familiar with text editors such as vi and emacs.
-    Out of the box thinking, in order to challenge the feature.

Desired Personality Characteristic:

-    Independent learner.
-    Independent worker and problem-solver.
-    Good interpersonal relationships.
-    Ability to convey opinion and requirements.
-    Strong English communication skills.

Interested candidates can send their CV’s to [email protected] and write PV DV in the subject field.

متطلبات الوظيفة
تفاصيل الوظيفة
المسمى الوظيفي Design Verification Engineer
آخر موعد للتقديم 30 - Nov - -0001
المكان رام الله والبيرة
نوع الوظيفة دوام كامل
المستوى المهني متوسط الخبرة
الدرجة العلمية البكالوريوس
الخبرة No Experience
آلية التقديم
نصيحة من جوبس لحمايتك : عند التقدم لاية وظيفة عن طريق الانترنت، لا تقم بإعطاء معلومات بطاقة الأعتماد او أية معلومات بنكية / مالية لصاحب عمل.